大家好，有人测试过D435上彩色摄像机的线性度吗？谢谢！以上来自于谷歌翻译以下为原文Hi all, Has anyone tested the linearity of the color camera on the D435? Thanks!
2018-10-19 11:51
你好我想知道是否有用于Windows的GRID M40的驱动程序。我理解Vdi是不可能的，但我想使用该卡进行编码以编码h.264谢谢以上来自于谷歌翻译以下为原文HiI was wondering if there is a Driver for the GRID M40 for windows. I understand Vdi is not possible but i wanted to use the card for compute for encoding h.264Thanks
2018-09-28 16:43
各位发烧友好！本人正在设计一个电源管理电路，需要将一个输入为12V的直流电源转化为4个7V，4个-0.1V的直流电源输出，因为我缺乏这方面经验，请问大家有什么芯片或者设计方案推荐的吗？谢谢！
2017-08-09 16:37
MicroBlaze是一款基于构造的的嵌入式微处理器，它的显著优势在于能满足复杂应用的需求，在除了运行简单的通用应用以外，还能运行操作系统。
2019-10-11 07:08
已经是能了CRC时钟，但是还是无法继续运行；int main(void){ u8 i=0; uart_init(72,9600); //串口初始化为9600 printf("******STemWin start*****\r\n"); printf("uart_init done\r\n"); delay_init(72);//延时初始化 printf("delay_init done\r\n "); LED_Init();//初始化与LED连接的硬件接口 printf("LED_Init done\r\n "); LCDx_Init(); //初始化LCD LCD_ShowString(100,100,200,200,16,"TEST");//显示清屏区域 printf("LCDx_Init done\r\n "); KEY_Init(); //按键初始化 printf("KEY_Init done\r\n "); tp_dev.init(); //触摸屏初始化 printf("tp_dev.init done\r\n "); POINT_COLOR=RED; //设置字体为红色 /******************************************************** * *针对STemWin必须得开启 *使能CRC时钟，STemWin需要开启CRC时钟，要不无法正常启动 * */ //初始化 RCC_DeInit(); printf("RCC_DeInit done\r\n"); //RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE); printf("1 begin gui-init\r\n"); //目前打印到这里就结束了，后面没有打印了。 GUI_Init(); printf("2 done gui-init\r\n"); GUI_DispString("Hello STemWin!\r\n"); printf("3GUI_DispString done\r\n"); while(1) { i++; if(i%20 == 0) { LED0=!LED0;printf("led change :%d\r\n",i); }delay_ms(20); }}
2020-05-21 09:17
你好。我对NVidia开发人员提出了问题和建议。关于GPU调度程序的真正功能的信息很少。调度程序只是简单的循环法吗？它是可编程的吗？它是从dom0编程的（例如，Dom0中的vgpu / libnvidia-vgpu进程）？十多年来，有更复杂的调度程序。如果你查看网络硬件，你可以看到更多高级调度程序（https://en.wikipedia.org/wiki/Network_scheduler）。由于NVidia背景基于Sun Microsystems，因此SunOS / Solaris中有更复杂的处理器调度程序示例。 SunOS / Solaris公平共享调度程序（FSS）（实现共享，包括分层共享（区域/项目））和动态池（实现封顶和固定/绑定）的组合非常强大，并且易于实现并且几乎可以展示其功能20年。GPU调度程序可以更复杂吗？如果是的话，还有更多实际目标： - 如果共享是可编程的，则应该删除“在一个物理gpu中一个类型的所有vgpu（例如k120q）”的限制！ - 如果共享的分层可编程性比CUDA可用，则所有vGPU类型都应该可用！ - 如果调度程序具有固定/绑定功能（对SMX），则由于较少的指令和数据缓存未命中，性能应该提升！ - 如果调度程序（可能是非分层的）可以移动到domU for Grid2.0“完整”配置文件M6-8Q和M60-8Q可以删除dom0的开销并在domU中启用CUDA而不是相同的功能应该可用于k180q和k280q （是的，我仍然乐观地认为NVidia总部允许将此功能向后移植到K1 / K2网格）！GPU调度程序是否有任何可观察性API（性能监视器API）（每个vGPU（在Dom0中）和vGPU内部的每个进程（在DomU中））？（https://gridforums.nvidia.com/default/topic/809/nvidia-grid-vgpu/vgpu-utilization-per-vm/）谢谢你的回答，马丁以上来自于谷歌翻译以下为原文Hello.I have questions and proposal to NVidia developers. There are few information about true function of GPU scheduler.Is the scheduler only simple round-robin ?Is it programmable ?Is it programmed from dom0 (eg. vgpu/libnvidia-vgpu process in Dom0) ?There are more sophisticated schedulers for more then decade. If you look in network hardware you can see many more advanced schedulers (https://en.wikipedia.org/wiki/Network_scheduler). Because NVidia background is based on Sun Microsystems there is more sophisticated example of processor scheduler in SunOS/Solaris. The SunOS/Solaris combination of Fair Share Scheduler (FSS) (implements sharing, including hierarchical shares (zones/projects)) and dynamic pools (implements capping and pinning/binding) is VERY powerful and also simple to implement and demonstrating its power for nearly 20 years.Can the GPU scheduler be more sophisticated ?If yes, there are more practical goals:- If the share is programmable than the restriction about "all vgpu of one type (for example k120q) in one physical gpu" should be removed!- If the share is hierarchically programmable than the CUDA in all vGPU types should be available !- If the scheduler have pinning/binding capability (to SMX) than the performance should be boosted due to less instruction and data cache misses ! - If the scheduler (probably non hierarchical) can be moved to domU for Grid2.0 "full" profiles M6-8Q and M60-8Q that remove overhead of dom0 and enable CUDA in domU than the same feature should be available for k180q and k280q (yes, I am still optimistic that NVidia HQ allows to backport this feature and more to K1/K2 grid) !Is there any observability API (performance monitor API) for GPU scheduler (per vGPU (in Dom0) and per processes inside vGPU (in DomU)) ? ( https://gridforums.nvidia.com/default/topic/809/nvidia-grid-vgpu/vgpu-utilization-per-vm/ )Thanks for answers, Martin
2018-09-11 16:37
由多台计算机分别控制生产过程中多个控制回路，同时又可集中获取数据、集中管理和集中控制的自动控制系统 。分布式控制系统采用微处理机分别控制各个回路，而用中小型工业控制计算机或高性能的微处理机实施上一级的控制 。
2020-03-13 09:02
STM32F103通过SPI口搭建以太网口，大家都是怎么做的？
2019-08-21 04:07
有人会协助我的4阶段if语句的逻辑。它基本上执行四组中的一组，具体取决于如何设置2个拨码开关。问题是，无论我如何设置2个拨码开关，它总是转到868行（见附件）。无论我如何设置外部拨码开关，我都无法前往859,862或865行。我已经监控了dip开关，它们在3.3V或0V逻辑电平下运行正常，具体取决于倾角位置。将1个接口浸入PA2，将2个接口浸入PC5。 也许我没有设置正确的括号，或者我的中心＆amp;需要＆amp;＆amp ;?也许是我！是不是正确的操作数？我甚至尝试了根据839-855行的不同方法，但这并不是全部工作，即在设置841,845,850或854的断点之后，它从未停止过。以上来自于谷歌翻译以下为原文 Would someone assist with the logic of my 4 stage if-statement.It basically performs one of four groups depending upon how 2 dip switches are set.The problem is that no matter how I set the 2 dip switches it always goes to line 868 (see attachment).I can never get it to go to line 859, 862, or 865, no matter how I set the external dip switches.I have monitored the dip switches and they are functioning properly as a 3.3V or 0V logic level, depending upon dip position.Dip 1 interfaces to PA2, and dip 2 interfaces to PC5. Maybe I don't have my parenthesis set correct, or maybe my center & needs to be &&?Perhaps my ! is not the correct operand?I even tried a different approach as per line 839-855, but that didn't work AT ALL, i.e., after setting breakpoints at 841,845,850,or 854, it never stopped.
2018-11-15 10:54
EtherCAT的原理是什么？EtherCAT有哪些功能？怎样去实现EtherCAT的应用层？EtherCAT有哪些应用实例？
2021-07-02 06:52
