*/NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);/* Enable TIM3 global interrupt with Preemption Priority
2015-02-12 11:32
into preemption priorities and sub-priorities should have all bits configured as preemption priority.
2018-05-23 17:53
更新后，我的四个 uart 通信不再有效。经过大量挖掘，我发现 CubeMX 正在设置 Uart Preemption = 5，从而生成以下代码。 /* UART8 中断初始化
2023-01-12 06:05
/O口重映射开启*/GPIO_PinRemapConfig(GPIO_Remap_USART1,ENABLE);// /* Configure the NVIC Preemption Priority
2013-03-07 15:54
: linux-qoriq-5.15.71+gitAUTOINC+95448dd0dc-r0 do_patch: Applying patch \\\'0135-arm-Add-support-for-lazy-preemption.patch\\\' on target
2023-05-05 11:13
();/* Setting GPDMA interrupt */ // Disable interrupt for DMA NVIC_DisableIRQ (DMA_IRQn); /* preemption = 1, sub-priority = 1 */ NVIC_SetPriority(DMA_IRQn,
2017-12-12 15:49
?if can't occure preemption, the RTC being updated by systick is not accurate. 2, can PSoC4100s support interrupt preempt? how to use it. thanks.
2018-09-03 16:08
你好， 昨天，我调查了我的SPC560B软件项目的问题。控制器上运行了多个计算，它还通过UART与PC通信。当我试图提高UART波特率时，我得到了控制器“错过”PC发送的一些字节的效果。 我发现，这个因素的原因与UART RX中断和周期性定时器PIT产生的中断有关。 PIT导致中断后，UART RX不能触发中断。我一直认为即使当前正在运行另一个较低的先前中断，更高优先级的中断也会破坏程序？ 最好的祝福， 帕特里克以上来自于谷歌翻译以下为原文 Hello, Yesterday, I investigated a problem with my software project for an SPC560B. There are several calculations running on the controller and it additionally communicates over UART with a PC. When I tried to increase the UART baud rate, I got the effect that the controllers ''miss'' some bytes sent by the PC. I found out, that reason for that effekt has something to do with the UART RX interrupt and an interrupt created by the periodical timer PIT. After the PIT causes an interrupt, the UART RX can not trigger an interrupt. I always thought that a higher priority interrupt can break the program even when another lower prior interrupt is currently running? Best regards, Patrik
2019-06-13 09:34
在F429中如何配置中断优先级组？
2022-02-10 06:38
嗨ST专家，我正在尝试使用SPC5作为多通道PWM控制器。通常，对于这种应用，占空比计算将在中断中完成。对于100kHz PWM，允许的中断持续时间小于10uS，例如最大8uS。其余时间（10uS-8uS = 2uS）应保留用于其他过程，例如通信等。由于多通道PWM有很多计算，因此必须最大限度地利用中断持续时间。但是，我发现输入一个中断需要> 1.2uS，然后再用1uS返回48MHz时钟的主程序。这意味着将浪费大约40％的中断持续时间。附件是用于测试中断持续时间和捕获波形的程序 - PIT通道1作为触发源; PC9是输出。我的问题是为什么SPC5需要这么多时钟才能进入并离开中断，有没有办法减少这种不必要的时序？谢谢！ #intc以上来自于谷歌翻译以下为原文 Hi ST expert,I am trying to use SPC5 as a multi-channel PWM controller. Normally for this kind of application, the duty cycle calculation will be done in an interrupt. For 100kHz PWM, the allowed interrupt duration is 1.2uS to enter an interrupt and take another 1uS to go back to the main routine for 48MHz clock. That means >40% of the interrupt duration will be wasted. Attached is my program used to test the interrupt duration and the captured waveform - PIT Channel 1 as the trigger source; PC9 is the output.My question here is why SPC5 needs so many clocks to enter and left the interrupt and is there any way to reduce such unnecessary timing?Thank you! #intc
2019-07-01 14:24
