ONn\");} else {GPIO_REG(GPIO_OUTPUT_VAL) &= ~(0x1 << LED1); // 熄灭LEDprintf
2025-03-07 11:14
嗨，我在运行Windows 7-32位版本的PC上安装了Xilinx ISE 10.1 Webpack。我为半加器电路编写了VHDL和测试平台。我想模拟它的行为模型我正在使用Xilinx ISE模拟器但是，在按下“模拟行为模型”选项后，控制台将报告以下错误消息：运行保险丝......fuse -intstyle ise -incremental -o tb_full_adder_isim_beh.exe -prj tb_full_adder_beh.prj -top tb_full_adder确定HDL文件的编译顺序分析VHDL文件full_adder.vhd从c：/xilinx/10.1/ise/vhdl/hdp/nt/ieee/std_logic_1164.vdb恢复VHDL解析树ieee.std_logic_1164从c：/xilinx/10.1/ise/vhdl/hdp/nt/std/standard.vdb恢复VHDL parse-tree std.standard从c：/xilinx/10.1/ise/vhdl/hdp/nt/ieee/std_logic_arith.vdb恢复VHDL解析树ieee.std_logic_arith从c：/xilinx/10.1/ise/vhdl/hdp/nt/ieee/std_logic_unsigned.vdb恢复VHDL解析树ieee.std_logic_unsigned分析VHDL文件tb_full_adder.vhd从c：/xilinx/10.1/ise/vhdl/hdp/nt/ieee/numeric_std.vdb恢复VHDL解析树ieee.numeric_std将VHDL解析树work.full_adder保存到c：/users/turtles/desktop/vhdl_lab/full_adder/isim/work/full_adder.vdb将VHDL解析树work.tb_full_adder保存到c：/users/turtles/desktop/vhdl_lab/full_adder/isim/work/tb_full_adder.vdb开始静态阐述完成静态细化保险丝内存使用：116404 Kb保险丝CPU使用率：638毫秒警告：HDLCompiler：746- “N：/K.31/rtf/vhdl/src/ieee/numeric_std.vhd”第867行。范围为空（空范围）警告：HDLCompiler：746- “N：/K.31/rtf/vhdl/src/ieee/numeric_std.vhd”第868行。范围为空（空范围）使用库std中的预编译包标准使用库ieee中的预编译包std_logic_1164使用库ieee中的预编译包std_logic_arith使用来自库ieee的预编译包std_logic_unsigned使用库ieee中的预编译包numeric_std编译实体full_adder [full_adder_default]的体系结构行为编译实体tb_full_adder的体系结构行为FATAL_ERROR：模拟器：Fuse.cpp：171：$ Id：Fuse.cpp，v 1.35 2007/11/07 21:25:47 sonals Exp $- 无法创建模拟可执行文件 终止。有关此问题的技术支持，请打开WebCase 该项目位于http://www.xilinx.com/support。FATAL_ERROR：Simulator：Fuse.cpp：171：$ Id：Fuse.cpp，v 1.35 2007/11/07 21:25:47 sonals Exp $- 创建模拟可执行文件失败进程将终止。有关此问题的技术支持，请通过http://www.xilinx.com/support连接此项目打开WebCase。我收到了FATAL_ERROR- 无法创建模拟可执行文件。我尝试在论坛上搜索此问题但无法找到确切的解决方案。你可能会找到我的项目名称没有空格，我将文件保存在C盘中。是否有解决此问题的方法？先谢谢你！以上来自于谷歌翻译以下为原文Hi, I have installed Xilinx ISE 10.1 Webpack in my PC running Windows 7 - 32 bit edition. I have written a VHDL and testbench for a half adder circuit. I would like to simulate its behavioral modelI am using the Xilinx ISE Simulator However, after pressing the "Simulate Behavioral Model" option, the console reports the following error message: Running Fuse ...fuse -intstyle ise -incremental -o tb_full_adder_isim_beh.exe -prj tb_full_adder_beh.prj -top tb_full_adder Determining compilation order of HDL filesAnalyzing VHDL file full_adder.vhdRestoring VHDL parse-tree ieee.std_logic_1164 from c:/xilinx/10.1/ise/vhdl/hdp/nt/ieee/std_logic_1164.vdbRestoring VHDL parse-tree std.standard from c:/xilinx/10.1/ise/vhdl/hdp/nt/std/standard.vdbRestoring VHDL parse-tree ieee.std_logic_arith from c:/xilinx/10.1/ise/vhdl/hdp/nt/ieee/std_logic_arith.vdbRestoring VHDL parse-tree ieee.std_logic_unsigned from c:/xilinx/10.1/ise/vhdl/hdp/nt/ieee/std_logic_unsigned.vdbAnalyzing VHDL file tb_full_adder.vhdRestoring VHDL parse-tree ieee.numeric_std from c:/xilinx/10.1/ise/vhdl/hdp/nt/ieee/numeric_std.vdbSaving VHDL parse-tree work.full_adder into c:/users/turtles/desktop/vhdl_lab/full_adder/isim/work/full_adder.vdbSaving VHDL parse-tree work.tb_full_adder into c:/users/turtles/desktop/vhdl_lab/full_adder/isim/work/tb_full_adder.vdbStarting static elaborationCompleted static elaborationFuse Memory Usage: 116404 KbFuse CPU Usage: 638 msWARNING:HDLCompiler:746 - "N:/K.31/rtf/vhdl/src/ieee/numeric_std.vhd" Line 867. Range is empty (null range)WARNING:HDLCompiler:746 - "N:/K.31/rtf/vhdl/src/ieee/numeric_std.vhd" Line 868. Range is empty (null range)Using precompiled package standard from library stdUsing precompiled package std_logic_1164 from library ieeeUsing precompiled package std_logic_arith from library ieeeUsing precompiled package std_logic_unsigned from library ieeeUsing precompiled package numeric_std from library ieeeCompiling architecture behavioral of entity full_adder [full_adder_default]Compiling architecture behavior of entity tb_full_adderFATAL_ERROR:Simulator:Fuse.cpp:171:$Id: Fuse.cpp,v 1.35 2007/11/07 21:25:47sonals Exp $ - Failed to create simulation executableProcess willterminate. For technical support on this issue, please open a WebCase withthis project attached at http://www.xilinx.com/support.FATAL_ERROR:Simulator:Fuse.cpp:171:$Id: Fuse.cpp,v 1.35 2007/11/07 21:25:47 sonals Exp $ - Failed to create simulation executableProcess will terminate. For technical support on this issue, please open a WebCase with this project attached at http://www.xilinx.com/support.I am getting a FATAL_ERROR - Failed to create simulation executable. I tried searching this problem on the forums but couldn't find an exact solution. You may find theMy project names have no spaces and I saved my files in my C drive. Is there a workaround towards this problem? Thank you in advance!
2018-12-14 11:33
请问C代码在TMS320C54X上的手工汇编怎么优化？
2021-04-22 06:33
