有没有8.6的教程？
2012-04-30 23:37
Command and Conquer 3: Tiberium Wars. Looking through the support discussions, this seems to have been
2018-10-23 10:36
我正在尝试在我的Spartan-3an入门套件上实现与lcd屏幕的接口，我特别不想使用PicoBlaze或MicroBlaze。我的第一个问题是：如果我想使用8位接口，我是否必须遵循类似于电路板用户指南中提供的初始化过程（专门用于使用4位接口）？初始化过程中的步骤是什么？我探讨了更多的用户指南参考设计，并找到了在DNA Reader应用程序参考中使用8位接口的初始化过程。该特定应用程序使用了我想避免使用的PicoBlaze处理器，但我遵循了应用程序中使用的相同算法。然后我将以下命令传递给LCD：清除显示（x“01”），显示在（x“0F”）上，最后返回光标（x“02”），之后我希望在顶部看到一个闪烁的光标显示器的一角（地址x“00”），但没有闪烁的光标，只是一个完全空白的显示。当我试图将一个角色写入显示器时，它也没有出现。在将我的设计下载到FPGA之前的模拟显示所有命令正确地传递到LCD并且在命令之间有适当的时间间隔，我已经仔细检查了我直接从板文档中复制的UCF文件。我试图解决这个问题几天，并没有取得任何进展，所以我很感激任何人可能提供的任何帮助。以上来自于谷歌翻译以下为原文I am trying to implement an interface with the lcd screen on my Spartan-3an starter kit, I specifically don't want to use PicoBlaze or MicroBlaze. My first question is: If I wish to use the 8-bit interface, do I have to follow an initialisation process similar to the one provided in the board's user guide (which is specifically for using the 4-bit interface)? And what are the steps in the initialisation process? I poked around more user guides reference designs and found an initialisation process for using the 8-bit interface in the DNA Reader application reference. That specific application makes use of a PicoBlaze processor which I want to avoid but I followed the same algorithm used in the application. I then passed the following commands to the LCD: clear display (x"01"), display on (x"0F") and finally return cursor (x"02") after which I expected to see a flashing cursor in the top let corner of the display (address x"00") but there was no flashing cursor, just a completely blank display. When I tried to write a character to the display it didn't appear either. My simulation before downloading my design to the FPGA showed all commands passing to the LCD correctly and with appropriate time intervals between commands and I've double-checked my UCF file which I copied straight from the boards documentation. I've trying to solve this problem for a few days and haven't made any progress so I'd appreciate any help anyone may have to offer.
2019-05-23 09:48
你好，我使用一个32M Ram的分析器逻辑。这个分析器通过vee连接（vee pro6）当我使用Active X“getData”时，我有一个32M pts的数组。（好）但是如果我尝试过滤这个数组（例如：使用DLL只保留每个奇数值）我有错误代码910 =>内存不足.... vee支持的最大数组大小是什么？注意：pC ram是2GHave你有想法使用vee数组> 16M pts？谢谢 以上来自于谷歌翻译 以下为原文Hello,I use an Analyser logic with 32M Ram.This analyser is connected by vee (vee pro6)When i use the Active X "getData", i have an array of 32M pts.(good)But if I try to filtered this array (ex: use a DLL to keep onlyeach odd value) I have the error code 910=> Out of memory....The max array size supported by vee Is ?note: the pC ram is 2GHave you an idea to use vee with an array >16M pts?Thanks
2019-03-25 10:00
警告消息如下：警告地点：837- 找到部分锁定的IO总线。总线的以下组件未锁定：Comp：ADC2_ChA_D_NComp：ADC2_ChA_D_NComp：ADC2_ChA_D_NComp：ADC2_ChA_D_NComp：ADC2_ChA_D_NComp：ADC2_ChA_D_N警告地点：837- 找到部分锁定的IO总线。总线的以下组件未锁定：Comp：ADC2_ChA_D_PComp：ADC2_ChA_D_PComp：ADC2_ChA_D_PComp：ADC2_ChA_D_PComp：ADC2_ChA_D_PComp：ADC2_ChA_D_P在暗示我的设计时会抛出警告，因为现在，我不知道如何处理这个问题。和这将导致整个模块的故障。我的设计的顶层模块是用VHDL编写的，但是子模块部分用verilog，部分用VHDL编写，我可以确保组件部分和实例部分没有任何问题，并且所有的引脚都在ucf文件中定位。有没有人遇到同样的情况？我该怎么做才能解决这个问题？谢谢。以上来自于谷歌翻译以下为原文The warning message is list below: WARNING Place:837 - Partially locked IO Bus is found. Following components of the bus are not locked:Comp: ADC2_ChA_D_NComp: ADC2_ChA_D_NComp: ADC2_ChA_D_NComp: ADC2_ChA_D_NComp: ADC2_ChA_D_NComp: ADC2_ChA_D_N[/td][td]WARNING Place:837 - Partially locked IO Bus is found. Following components of the bus are not locked: Comp: ADC2_ChA_D_PComp: ADC2_ChA_D_PComp: ADC2_ChA_D_PComp: ADC2_ChA_D_PComp: ADC2_ChA_D_PComp: ADC2_ChA_D_PThe warning is thrown when implimenting my design, for now, I have no idea about how to deal with this. Andthis will lead to malfunction of the whole module.Top module of my design is writen in VHDL, however the sub-module is partlly in verilog and partly in VHDL, I can make sure that there is nothing wrong inthe component part and Instance part, and all pins are LOCed in the ucf file.Does anyone encounter the same situation? And what can I do to fix it?Thanks.
2018-10-12 14:21
本帖最后由 sushu 于 2013-3-18 21:50 编辑 我拿到一份数据，，要用labview8.5将其中的数据提取出来，转成波形，有哪位高手回的，请教，，就是这个txt文件里的数据，请告知我如何做，不胜感谢，我用里面自带的txt文件的读取那个读不出来啊。。。。我的联系qq1072464183，，求高手教导
2012-04-30 23:41
你好！我一直在研究Android应用程序。我买了一个RN4020模块来与我的Android设备通信。RN4020在UART板上与PIC16F87A MCU通信（至少它应该）。问题是，我已经尝试了很多东西来“恢复”RN4020，但我没有成功。我的Android设备无法发现这个模块。我使用的是微芯片RN4020演示应用程序和StaseDebug应用程序。我只有模块，而不是整个PICTHOK套件，所以终端和东西的演示视频对我没有多大帮助。这是下面的示意图：模块：PIC：所以，我与RN4020的最小连接是：UART TX、UART RX、WAKEYHW和WAKEYSW.在我随后连接CM的RN4020上。D/MLDP引脚到PIC引脚2（RA0），并将RTS引脚连接到PIC引脚6（RA4），均在导线上。这样做，并尝试“流量控制”和CMD/MLDP建议，从这个论坛上阅读，仍然没有从模块的反应。我确实得到“活跃”引脚高，蓝色LED灯打开。我现在唯一想做的就是能够用我的Android设备发现这个模块，它支持4 BT。UTART是用Microchip App计算的（见图：），因为PIC在5V电源上，RN4020在3V3上，我甚至在PIC RX侧上放置10K欧姆上拉电阻，但是ST。不起作用。所以，我的问题是，我错过了什么？这是我假定应该执行的代码（但显然不是：）：UART：有些代码可能有点奇怪，但最近我已经改变了很多，所以有些部分是“过去的罪恶”；这里是PIC代码：所以，有人能帮助M吗？这就是我从电路中得到的结果： 以上来自于百度翻译 以下为原文 Hi! I've been working on an Android app. I've bought a RN4020 module to communicate with my android device. RN4020 communicates with PIC16F877A MCU on the board over UART (at least it should). The problem is, I've tried so many things to "revive" RN4020, but I did not succeed. My Android device can't discover the module. I'm using Microchips RN4020 DEMO app and SmartDiscover app. I only have the module, not the whole PICTAIL kit, so demo videos with terminal and stuff doesn't help me a lot. This is the following schematics:The module: [/url] PIC: [url=http://shrani.si/?3S/13z/4DBjmZKr/1/pic.png] So, the minimum connections I have with RN4020 are: UART TX, UART RX, WAKE_HW and WAKE_SW.On the RN4020 I've subsequently connencted the CMD/MLDP pin to the PIC pin 2 (RA0) and connected the RTS pin to the PIC pin 6 (RA4), both over the wire. Doing so and trying the "flow control" and CMD/MLDP suggestions based from read on this forum, still no reaction from the module. I do get the "ACTIVE" pin high and the blue LED lights ON. The only thing I want to do right now is to be able to discover the module with my android device, which supports the 4.0 BT. UART is set as calculated with the Microchip app (see photo: [url=http://shrani.si/?26/8V/1Uz0UmDI/1/screenshot2017-06-09-07-.png][/url]) Since PIC is on 5V supply and RN4020 is on 3V3 i've even put the 10k ohm pull-up resistor on PIC Rx side, but still no effect. So, my question is, what did I miss? This is the following code I assume should work (but apparently isn't :) ): THE UART:#define UART_TX_Empty() TXSTAbits.TRMT char UART_Init(const long int baudrate){BRGH = 1; //High Baud Rate select bitSPBRG = 9; //Writing SPBRG RegisterSYNC = 0; //Setting Asynchronous Mode, ie UARTSPEN = 1; //Enables Serial PortTRISC7 = 1; //As Prescribed in DatasheetTRISC6 = 1; //As Prescribed in DatasheetCREN = 1; //Enables Continuous ReceptionTX9 = 0; //8-bit transmition RX9 = 0; //8-bit receptionTXEN = 1; //Enables Transmissionreturn 1; //Returns 1 to indicate Successful Completion } void UART_Write(char data){while(!TRMT); //Waiting for Previous Data to Transmit completlyTXREG= data; //Writing data to Transmit Register, Starts transmission} void UART_Send_String(char* string){char* text = string;while(*text != '\r'){if(UART_TX_Empty())UART_Write(*text++);}UART_Write('\r');} char UART_Data_Ready(){return RCIF; } char UART_Read(){while(!RCIF);return RCREG;} void UART_Read_Text(char *Output, unsigned int length){unsigned int i;for(int i=0;i
2019-03-12 14:11
你好-我正在尝试使用IODELAY2来实现变量，但异步延迟。我正在使用SP605开发板，我在映射测试设计时遇到问题，我在这里延迟了函数发生器的输入。由于我需要异步延迟，我必须在IODELAY2上使用BUFG或BUFIO2时钟缓冲器。但是，SP605上的时钟引脚与我的数据输入引脚不在同一个IO bank中，这使我在实现时出现映射/ PAR错误。有关如何实现这一点的任何建议？或者它可能不可行？谢谢。以上来自于谷歌翻译以下为原文Hello- I'm trying to use IODELAY2 to implement a variable, but asynchronous delay.I'm using the SP605 development board, and am having trouble mapping a test design where I delay an input from a function generator. As I need an asynchronous delay, I have to use a BUFG or BUFIO2 clock buffer on IODELAY2.However, the clock pins on the SP605 are not on the same IO bank as my data input pins, which gives me mapping/PAR errors on implementation. Any suggestions on how to implement this?Or maybe it's not feasible?Thanks.
2019-06-04 09:34
嗨，第三次我试图解决我的问题，让ADC-DAC正常工作。我注意到当我运行ADC时，我没有得到正确的SPI_MISO信号，我的vhdl代码是否有故障，还是其他的东西？以上来自于谷歌翻译以下为原文Hi, third time I'm trying to solve my problem to get the ADC-DAC working correctly.I've noticed that when I'm running the ADC, I don't get a correct SPI_MISO signal, is there a fault in my vhdl code, or is it something else?
2019-06-05 07:10
下面的代码是为8位CRC编写的。有人建议如何转换下面的代码为16位CRCCode修改 以上来自于百度翻译 以下为原文 The below code written for 8 bit CRC . Can someone suggest how to convert below code for 16 bit CRC unsigned int crc_fn(unsigned char *dpacket,unsigned int len) // CRC Function(Error calcualtion){ unsigned int crc = 0xffff,poly = 0xa001; unsigned int i=0; for(i=0;i= 1;crc ^= poly;}else crc >>= 1; } } return (crc); } Code modifiedunsigned short crc16(const unsigned char* data_p, unsigned char length){ unsigned char x; unsigned short crc = 0xFFFF; while (length--){x = crc >> 8 ^ *data_p++;x ^= x>>4;crc = (crc
2018-10-16 11:00
