PCB电源供电系统设计概览如何去实现PCB电源供电系统的设计？
2021-04-26 06:39
PCB电源供电系统设计概览降低电源供电系统的阻抗应该遵循什么原则？
2021-04-27 06:40
嗨，出于好奇我不知道是否有人会费心去回答这个问题，但是我第一次看到校准套件并且我的价格让我感到震惊。实际上从外面的材料看起来像钢连接器，泡沫，一个漂亮的木盒子。我只能想象，对于重复使用的公差，材料的等级有多精确，可能是高价来自或可能是因为它的独特性。可能他们是由我不知道的专家手工制作的。制造这种试剂盒需要什么样的特殊设备，内部是否有任何超昂贵的材料，安捷伦是否将它们作为第三方使用。 VNA是一种先进的电子机器，内部也必须具有精密机械部件，并且设计复杂，我觉得它们的价格不如校准套件高。另外我知道有些机器内部有一个工厂校准，如果它们没有标准可以召回，粗测量会有更多的不确定性。但是有可能在电缆末端使VNA完全自校准，也许可以使用VNA中自包含的标准。与现在的校准和验证套件和程序相比，这是否更实惠，更简单？顺便说一下，我喜欢木盒子，我希望安捷伦不要用塑料盒子来改变它们。 以上来自于谷歌翻译 以下为原文Hi, just out of curiosity I dont know if anyone would bother to answer this but the first time I looked at a calibration kit and the price at I was shocked. Actually from the outside the materials were a few look like steel connectors, foam, a nice wooden box. I can only imagine how precise has to be the tolerances, grade of materials for repeated use and probably that is where the high price comes from or maybe is because of its uniqueness. Probably they are hand made by experts I just dont know. What kind of special equipment is necessary to make this kits, is there any ultra expensive materials inside and does Agilent makes them o some third party.A VNA is a state of the art electronics machine that must have precision mechanical parts inside as well and with its design complexity I feel they are not as highly priced as cal kits.Also I know some machines have a factory cal inside that can be recalled in case they is no standards available, of coarse measurements will have more uncertainties. But would it be possible to make a VNA totally self calibrating at the end of the cables maybe with the standards self contained in the VNA. Could this be more affordable and less cumbersome than it is now with the calibration and verification kits and procedures? By the way I do love the wooden boxes I hope Agilent dont change them with plastic ones.
2019-02-28 15:00
你好，我正在设计一个带有ADC和DAC的基于FPGA的信号处理单元（大约1MSPS采样率，最大32MHz到50MHz SPI数据时钟速率）。系统将由50MHz振荡器提供时钟（DCM内部增加到150MHz）。第一个原型被设计为Spartan-3E Starter-Kit的扩展，现在我正在设计完整的系统。不幸的是我必须使用PQ208封装，因为我们无法焊接BGA封装。 PCB只有两层铜层（顶部/底部），底层主要用作接地层。现在我有一些问题：是否可以在双层PCB上使用PQ208封装？何处放置去耦电容？目前，我计划为每个电源引脚（如Spartan-3E入门板）使用1nF和47nF陶瓷电容，为每个VCCO组，VCCINT和VCCAUX提供470nF陶瓷电容和10uF陶瓷电容。当我将帽（特别是1nF / 47nF）直接放在顶层（FPGA所在的位置）的电源引脚上时，我阻止了对I / O引脚的访问。但是当我将它们放在底部并使用两个过孔和走线连接到FPGA时，这会增加电感。你有建议我应该如何布线电源吗？在这些情况下我是否应该考虑哪些重要的事情？谢谢提前任何帮助。最好的祝福，基督教消息由milindur于10-30-2009 04:41 PM编辑以上来自于谷歌翻译以下为原文Hello, I am designing a FPGA-based signal processing unit with ADCs and DACs (about 1MSPS sampling rate, max. 32MHz to 50 MHz SPI data clock rate). The system will be clocked by a 50MHz oscillator (internally increased to 150MHz by a DCM). The first prototype was designed as extension to the Spartan-3E Starter-Kit, now I am designing the complete system. Unfortunately I have to use the PQ208 package as we are not able to solder BGA-packages. The PCB only has two copper-layers (top/bottom) where the bottom layer will be mainly used as groundplane. Now I have got some questions: Is it possible to use the PQ208-package on a two-layer PCB?Where should I place the decoupling capacitors? Currently I am planing to use a 1nF and a 47nF ceramic cap for each supply pin (as in the Spartan-3E Starter-Board), a 470nF ceramic cap as well as a 10uF tantal cap for each VCCO-bank, VCCINT and VCCAUX. When I place the caps (especially the 1nF/47nF) directly at the supply pins on the top layer (where the FPGA is), I am blocking the access to I/O-pins. But when I place them on the bottom side and use two vias and traces for connection to the FPGA this increases the inductance.Do you have a recommendation how I should route power supply?Are there any important things I should consider under these circumstances?Thanks for any help in advance.Best regards,ChristianMessage Edited by milindur on10-30-2009 04:41 PM
2019-06-20 11:54
我使用测试端口电缆的85054D端进行了1端口校准（50MHz至18GHz）和8510C。当我测量另一个85054D calkit Open和Shorts反射系数后，计算得很好的开路和短路多项反射系数。如果我使用8720系列分析仪重复相同的校准和测量，则开路和短路结果显示扫描的某些部分略微超过1个反射系数值（标准定义在8510C和8720上非常相同）。这种差异可能会来到哪里？当我将8510C和8720的开放和短期结果进行比较时，相位值显示几乎相同的值。只有幅度值有差异。所有使用的分析仪都经过工厂校准并符合规格，因此仪器具有良好的外形。 以上来自于谷歌翻译 以下为原文I have done 1-port calibration (50MHz to 18GHz) with 8510C using 85054D end of the test port cable. When I'm measuring another 85054D calkit Open and Shorts reflection coefficient following quite nicely calculated Open and shorts polynomical reflection coefficients. If I'm repeating the same calibration and measurements with 8720 series analyzers, Open and short results showing slightly over 1 reflection coefficient values on some part of the sweep (standard definitions are exatly the same on 8510C and 8720). Where this difference might come? When I'm comparing 8510C and 8720 open and short results together, phase values showing almost the same value. Only the magnitude values has difference. All used analyzers are well factory calibrated and meet spesifications, so instruments are good shape.
2018-09-29 17:26
基于Internet远程测控系统由哪几部分构成？基于Internet的远程测控技术有哪几种？基于Internet远程测控的应用与前景是什么？
2021-05-28 06:36
设计I/O电路时有哪些关注重点？如何建立一个安静的区域？
2021-04-22 06:30
一篇文章带你了解什么是原型制作化技术？
2021-04-26 06:15
