请问Xassette-Asterisk开发板做了哪些升级？
2021-12-28 06:43
an asterisk to appear by the filename, indicating that the program has changed. This doesn't happen
2019-08-08 13:09
to select your own configuration file, the tool adds an asterisk in front of the part number that is passed
2018-09-07 10:43
随着移动通信用户不断增多，业务需求不断多样化，无线接入网的负载也逐渐增大，基站建设成本不断升高[ 1 ]。将基带信号处理算法用软件来实现可以大大降低基站的硬件规模和成本，因而目前移动通信研究中对软件无线电的研究成为热点。而目前通用处理器性能不断提高[ 1 ]，也加速了软件无线电的应用和发展。改进和优化均衡算法，能充分实现了软件无线电的基带处理，大大降低系统成本。但谁知道具体该怎么做吗？
2019-08-02 08:21
shows the failing constraints (preceded with an Asterisk (*)). Please use the Timing Analyzer (GUI
2019-02-21 10:15
嘿，我有一个警告PAR 468，我以前没见过。有谁知道该怎么办？警告说建议会帮助我，但我看不到任何建议。系统简介：一个模拟数字转换器读出系统，包含一个48 MHz至100 MHz的转换器时钟内核，两个8位宽度的256字节深度块内存和一些其他没有任何规范的子模块......提前致谢...以上来自于谷歌翻译以下为原文Hey I'm having a warning PAR 468 that I didnot see before. Does anyone know what to do with this? Also warning says suggestions will assist me but I can't see any suggestion. System in brief: an analog digital converter readoutsystem, containing a 48 MHz to 100 MHzconverter clock core, two 8bit width 256 byte depth block ram and some other submodule without any specification ...Thanks in advance...
2018-11-07 11:37
所有：也许这是我有限的颅骨能力，但我无法准确地理解数据是如何通过UART组件处理到FIFOs并随后由DMA读出的。1）在每个UDB和UARTIS（DUH）UDB基础上有两个4字节FIFO。我假设一个FIFO用于RX，另一个用于TX。现在，我们是否只有8位的ASTATIC4FIFO元素，或者它们可以被级联/细分（2个FIFO元素，用于16位，等等）？2）如何将DMA指向FIFO中的正确位置，或者仅仅是由FIFO控制逻辑自主处理的任务？3）如果在FIFO超时读取数据时会发生什么……它只会传入数据，或者读出的数据现在被破坏了。4）用于设置DMA的正确地址是什么？基地地址是外围基地吗？或者我应该使用UARTARI（$数）？假设上16位是UARTHARRXDATAYPTR。5）在UART头文件中，我注意到有一个指向RXI数据缓冲区的指针（UARTHARRXDATAYPPTR）和指向与缓冲区相关联的类型Reg的指针（UARTHARRXDATAYRE）。后者是用来干什么的？叫我哑巴，为什么需要指针指向寄存器？它是否用作某个函数的参数？我试图在TRM文档中找到这些数据的粒度，但到目前为止，我已经无法，所以请原谅我，如果这些问题中的任何一个看起来无知，但我只是不知道在哪里可以找到详细的信息。 以上来自于百度翻译 以下为原文All: perhaps it is my limited cranial capacity, but I am unable to understand exactly how the data is processed into the FIFOs by the UART component and subsequently read out by a DMA. 1) There are two 4 byte FIFOs in each UDB and the UART is (duh) UDB-based. I assume one FIFO is used for the Rx, the other for Tx. Now, do we have a static 4 FIFO elements only for 8 bits, or can they be concatentated/subdivided (2 FIFO elements for 16 bits, etc.)? 2) How do you point the DMA to the correct spot in the FIFO, or is that simply task handled autonomously by the FIFO control logic? 3) What happens if you're trying to read data while the FIFO overruns...it the incoming data simply pre-empted or is the read-out data now corrupted. 4) What is the correct address to use for setting up the DMA. Is the base address PERIPHERAL _BASE? Or should I use UART_($number)_RXDATA_PTR? I assume the upper 16 bits are the UART_RXDATA_PTR. 5) In the UART header file, I notice there is a pointer to the RX_DATA buffer (UART_RXDATA_PTR) and a pointer to a pointer to type reg associated with the buffer (UART_RXDATA_REG). What is the latter used for? Call me dumb by why do you need a pointer to a pointer to the register? Is it used as an argument to some function somewhere? I tried to find this granularity of data in the TRM documents but thus far I've been unable, so pardon me if any of these questions seem ignorant but I just don't know where to find the detailed information.
2019-05-07 10:28
嗨，我最近购买了MSOX2012A示波器。我的主要用途是能够实时可视化并调试包含模数转换器（ADC，A2D ......）的系统。我需要能够同时看到至少一个模拟信号和至少一个SPI总线。令我惊讶的是，数字频道根本无法解码。甚至不支持一种串行协议，这是非常奇怪的，因为任何低级廉价的基于微控制器的逻辑分析仪都可以轻松解码大多数常见的串行信号，如SPI，I2C和UART。我试过你的“串行解码”插件对我来说没用，它只解码模拟通道，我只有两个模拟通道，我至少需要其中一个用于我的模拟信号。我知道你的实时串行解码器是在ASIC中实现的，而我的模型只能在模拟通道上使用，但串行数字协议的解码非常简单，并且计算要求低。大多数现代微控制器都实现了这一功能。你能实现某种基于软件的，甚至是“离线”（不是在运行模式下）串行解码吗？这将节省我切换到另一个范围的麻烦。现代逻辑分析仪可以解码串行数据。如果您的产品对大多数现代实施都没用，请不要声称您的产品有逻辑分析仪。您甚至无法解码经典的8位总线，因为您需要至少两个数字通道用于时钟和启用/ CS信号。我知道你的3000系列示波器可能会做我需要的但是它要贵得多。更新：我检查了其他MSO制造商：Tektronix：MSO2012B + DPO2EMBD它（价格相同）Rigol：MSO4012它（价格相同）Hameg：HMO1022 + HO3508 + HOO10有它（价格差不多）Siglent MSO / SDS2102 +功能基因。 +串行解码有它（有点便宜）Lecroy：MS-250 +串行解码选项有它（更贵但更好）所以，实际上只有安捷伦不会在他们的“MSO”上的数字串行通道上触发和解码编辑：David14 on Mar 17,2014 2:54 AM 以上来自于谷歌翻译 以下为原文Hi, I very recently purchased the MSOX2012A scope. My main intended use is to be able to visualize in real time and debug systems that include analog to digital converter (ADC, A2D...) . I need the ability to see at least one analog signal and at least one SPI bus simultaneously. To my surprise the digital channels cannot be decoded at all. Not even one serial protocol is supported, this is very strange because any low level cheap micro-controller based logic analyzer can easily decode most common serial signals like SPI, I2C and UART. I tried your "Serial Decode" add-on it is useless to me, it only decodes analog channels and I only have two analog channels and I need at least one of them for my analog signal. I know that your real time serial decoder is implemented in the ASIC and on my model is only available on the analog channels, but the decoding of serial digital protocols is very simple and has low computational requirements. Most modern micro-controllers implement this feature. Can you implement some sort of software-based, even "offline" (not in run mode) serial decoding? this will save me the trouble switching to another scope. A modern Logic Analyzer can decode serial data. Please do not claim that your product has a logic analyzer if it is useless for most modern implementations. You cannot even decode a classic 8bit bus because you need at least two more digital channels for the clock and enable/CS signals.I know that your 3000 series scopes can probably do what I need but it is much more expensive. Update: I checked other MSO manufacturers: Tektronix: MSO2012B + DPO2EMBD Has it (about the same price)Rigol: MSO4012 Has it (about the same price) Hameg: HMO1022 + HO3508 + HOO10 Has it (about the same price) Siglent MSO / SDS2102 + function gen. + serial decode Has it (somewhat cheaper) Lecroy: MS-250 + serial decode option Has it (more expensive but better) So, actually only Agilent wont trigger and decode on digital serial channels on their "MSO"Edited by: David14 on Mar 17, 2014 2:54 AM
2019-01-08 15:18
大家好，有一个PSoC 4 BLE编程与先锋工具包CasSoSE接近实例作为外围设备/服务器。要设置另一个对应的中心/客户端。从先锋工具包IAS中心示例开始，并将Mind Mind配置文件更改为自定义，然后在BLE组件中复制自定义CAPSENSE服务。让两个连接，现在需要对客户端进行编码，以便在服务器上启用通知。大量的例子和阅读API，但仍然很困惑，要使用哪种API命令以及参数具体需要什么。具体地说，如何指定定制的CAPSENSE服务ccCD，并将其值设置为API函数中的0x01？那么如何实际阅读通知呢？ 以上来自于百度翻译 以下为原文Hello All, Have one PSOC 4 BLE programmed with the Pioneer kit CapSense Proximity Example acting as the Peripheral/Server.Want to set up another to be the corresponding Central/Client.Started from the Pioneer kit IAS Central Example and changed the Find Me Profile to Custom then duplicated the custom CapSense service in the BLE component.Got the two to connect, now need to code the client to enable notifications on the server.Been pouring over examples and reading the API but still very confused as to which APIcommand to use and what the arguments specifically need to be.Specifically how to specify the custom CapSense service CCCD and set it's value to 0x01 in the API function? Then how to actually read the notifications?
2019-01-02 16:41
