数据表规定Vref在“绝对最大额定值”部分下变为0至3.3V，并为不同的逻辑系列指定了许多特定的Vref电平。任何人都知道Vref电平是否有其它限制，这些限制将使用给定的VCCO或VCCAUX电源做一些有用的事情（也就是说，不仅仅是“好，它不会损坏设备......”）？将输入配置为HSTL / SSTL的输入是快速的，片上集成的比较器+ +连接到IO并且 - 连接到Vref？显然，这不符合现有的逻辑系列或规范，但是 - 如果可用的参考范围确实是0到3.3V- 它可以消除在比较器可以的情况下需要大量的片外比较器芯片都使用相同的参考电压。以上来自于谷歌翻译以下为原文The datasheet specifies that Vref goes 0 to 3.3V under the "absolute maximum ratings" section, and it specifies a number of specific Vref levels for different logic families.Anyone know if there are other limits to the Vref levels which will do something useful (that is, more than simply "well, it won't damage the device...") with a given VCCO or VCCAUX supply?Would an input configured as HSTL/SSTL work as a fast, on-chip-integrated comparator with + connected to the IO and - connected to Vref? Obviously that wouldn't be compliant with an existing logic family or specification, but -- if the available reference range really is 0 to 3.3V -- it could eliminate the need for a lot of off-chip comparator silicon in the case where the comparators can all use the same reference voltage.
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