\ble50_security_serverexamples\bluetooth\bluedroid\ble_50\ble50_security_client历史：原 ble50_security_server demo，使用 旧手机 honor
2023-02-20 08:33
求大神分享MY-RK3288-EK314 L31079测试手册
2022-03-02 07:56
and/or connecting. I spent few deys on this and: * Tried HUAWEI honor 9, and Samsung galaxy s5* Tried some old
2018-09-21 16:52
我在市场上购买4000x系列或9000x系列示波器，我目前正在比较两种型号的规格。我对4000x无法理解的一件事是预触发设置。据我了解，使用9000x，可以在任何地方设置触发参考点。所以我可以将参考点设置为结束，当触发发生时，我可以返回并检查整个采集存储器以查看触发之前发生的情况。如果我错了，请纠正我。但目前尚不清楚我是否可以用4000x做同样的事情。根据我在手册，数据表等中读到的内容，我的感觉是有一些限制。有人可以澄清一下吗？ 以上来自于谷歌翻译 以下为原文I am in the market to buy either a 4000x series or a 9000x series scope and I am currently comparing the specs of both models. One thing that I wasn't able to understand for the 4000x is the pre-trigger setting. As I understand it, with the 9000x, the trigger reference point can be set anywhere. So I could set the reference point to the end and when a trigger occurs, I can go back and examine the entire acquisition memory to see what occurred prior to the trigger. Please correct me if I'm wrong. But it isn't clear whether I can do the same thing with the 4000x. Based of things I have read in the manual, the data sheet etc, my feeling is that there are some restrictions. Can anybody please clarify this?
2018-12-03 10:11
如何通过安卓模拟器实现APP控制小车？
2022-01-19 06:29
嗨，所有（仍然无法连接图像……）我目前正在实施一个基于FGPA的USB高速控制器使用一个UB3300（WaveSeHARE模块）。当使用全速（12Mbit）时，一切看起来都很好，但是在高速情况下看起来很奇怪。3300模块使用外部复位线硬复位，然后使用函数控制寄存器逻辑复位，暂停被禁用，OTG寄存器被清除，所有其他位都设置为外围全速。在主机连接时，执行通常的高速协商（并且我有CON）。使用范围，我可以清楚地看到重置，外围啁啾，主机啁啾和终端启用），我们按照ULPI规范配置它。当我收到第一个DATA0包后，安装包，一些奇怪的事情发生（见附图）。我使用FPGA本身来捕获所有的ULPI信号。http://www. alvi.com /ZPUI…0xrxCMdOddiTiS1.jpg.DATA0数据包是LIGHT中的10字节（GETSA描述符），但是只有9个是由PHY发送的（LASY CRC字节丢失）。在第一个CRC字节（0xDD）之后，NXT行下降，此时我期望接收RXCMD，但是我得到所有零，这根本没有意义。另外，我好像收到了三个。没有来自PHY的RX错误指示。如果我忽略了包长度，CRC检查并继续进行，这一切似乎都很顺利。然后我从主机中获得In包，并且我可以在没有任何问题的情况下将它发送出去：http://wwwalAlv.com /ZPUI…GES/UB33xIn nAk.jpg2包似乎很受欢迎，有些人不这样做——我有时得到（10字节请求）7字节，8字节，9字节。我似乎从来没有收到任何RxRebug指示。如果我确实有CRC检查，我完全无法枚举该设备在HS -它确实在FS枚举完美，同一PHY。任何线索可能会发生什么？阿尔维 以上来自于百度翻译 以下为原文 Hi all,(still unable to link images...)I am currently implementing a FGPA-based USB High-Speed controller using an USB3300 (Waveshare module).Everything seems to work well when using Full-Speed (12Mbit), but things are looking weird at High-Speed.Just to give a glimpse of the initial setup, the USB3300 module is hard-reset using the external reset line, then logically reset using the Function Control register, Suspend is disabled, OTG register is cleared and all other bits are set up for Peripheral Full-Speed.Upon host connection, the usual High-Speed negotiation is performed (and I have confirmed it using a scope, I can see clearly the reset, Peripheral Chirp, Host Chirp and the terminators enabling) and we configure it as per ULPI spec.When I receive the first DATA0 packet, after the SETUP packet, something odd happens (see attached figure). I have used the FPGA itself to capture all ULPI signals.http://www.alvie.com/zpui...00_rxcmd_oddities1.jpgThe DATA0 packet is 10 bytes in lenght (GET_DESCRIPTOR), but only 9 are sent by the PHY (the lasy CRC byte is missing). After the 1st CRC byte (0xDD), the NXT line goes down, and at this point I'd expect to receive an RXCMD, but I get all zeroes, which do not make sense at all. Plus, I seem to receive three of them. There is no RXERROR indication coming from the PHY.If I ignore the packet lenght, the CRC check and proceed, it all seems to go well - I then get the IN packet from the host, and I can NAK it without any issue:http://www.alvie.com/zpui...ges/u***3300_in_nak.jpgSome packets seem to be well received, some others do not - I sometimes get (for a 10-byte request) 7 bytes, 8 bytes, 9 bytes. I never seem to receive any RXERROR indication at all. If I do have the CRC checks in place, I am completely unable to enumerate the device at HS - It does enumerate perfectly at FS, with the same PHY.Any clues about what might be going on ?Alvie
2019-02-20 15:35
您好，我的IT部门联系过我，询问安捷伦是否有任何软件计划允许将具有32位CPU和Windows XP的PNA或PNA-X升级到32位版本的Windows 7，主要是因为支持/更新Microsoft的Windows XP将于2014年4月8日停止。我知道某些PNA-X有计划的硬件升级，需要将cpu更改为64位处理器并使用64位Windows 7操作系统，但对于那些无法通过该路径进行硬件升级的PNA系统，我是想知道是否有替代计划。或者什么是安捷伦为其现有客户提供使用Windows XP的PNA / PNA-X建议，并且在2014年4月8日之后没有可能的硬件升级路径。谢谢，rok 以上来自于谷歌翻译 以下为原文Hello, I was contacted by my IT department to inquire whether Agilent has any software plan in place to allow the PNA or PNA-X with 32bit CPUs and Windows XP to be upgraded to the 32bit version of Windows 7, primarily because support/updates for Windows XP from Microsoft will cease on April 8,2014. I know there is a planned hardware upgrade for certain PNA-X's which will require changing the cpu to a 64bit processor and using a 64bit windows 7 operating system, but for those PNA systems which can't be hardwareupgraded via that path, I was wondering whether there is an alternative plan. Or what is Agilent is advising its existing customers of PNAs/PNA-Xs with Windows XP and no hardware upgrade path possible to do after this April 8, 2014 date. Thanks, rok
2018-12-14 16:56
