我们有一个带有Tesla M10的Hyper V 2016环境，我们希望在多个VM（rds）之间共享GPU资源吗？如果是这样的话？以上来自于谷歌翻译以下为原文We have a Hyper V 2016 environment with a Tesla M10 and we want to share the GPU resources across multiple VM's (rds) is this possible? If so how?
2018-10-08 14:21
嗨，我们即将在我们的网络中实施RDSH（而不是VDI），但我从互联网和本地供应商处获得了相互矛盾的信息，所以我希望有人可以回答几个问题。我们的RDSH客户要求很简单，办公室和一些内部应用程序（主要是基于网络的），但不清楚的部分是能够查看高清媒体（通过浏览器或媒体播放器）。 - 这种类型的使用需要GPU吗？ - 如果没有，GPU会从CPU卸载这类工作吗？或者那不起作用？ - 如果我使用GPU，单个RDSH VM是否可以使用多个GPU？ - 如何计算每个用户所需的内存（以及所需的GPU）？ - 每台服务器有多少用户？ - 您推荐哪种GPU用于此类用途？ - 需要什么类型的许可？设置信息：所有客户端仅限一台显示器，最大分辨率为1920x1080。所有客户端将通过1GB连接到他们的RDSH服务器。所有服务器都将作为Hyper-V 2016服务器上的VM运行。谢谢。以上来自于谷歌翻译以下为原文Hi,We are about to implement RDSH (not VDI) in our network, but I got conflicting info from the internet and local vendors, so I hope someone can answer a few questions.Our RDSH clients requirements are simple, office and some in-house apps (mostly web-based), but the unclear part is being able to view HD media (through browser or a media player).- Is a GPU required for this type of use?- If not, Will a GPU offload this type of work from the CPU? or will that not work?- If I use a GPU, will a single RDSH VM be able to use multiple GPUs?- How can I calculate the required memory (and GPU required) per user?- How many users per server?- Which GPU do you recommend for this type of use?- What type of Licensing is needed?Setup info:All clients will be limited to a single monitor and a maximum res of 1920x1080.All clients will be connected to their RDSH server via 1GB.All servers will be running as a VM on a Hyper-V 2016 server.Thanks.
2018-09-27 15:56
我想知道在90天试用期间，许可证管理器是否正常工作，因为现在它似乎没有显示任何计数/ ConnectedClients主持人：戴尔R730 +特斯拉M10 + Win2016嘉宾：Win10，win2012R2和Win10，DDA分配GPU。我们想把这个配置主要用作RDSH服务器，baremetal我想这就是它的名字。谢谢， alaxa以上来自于谷歌翻译以下为原文I was wondering if during the 90 days trial the license manager works as it should because now it doesn't seem to shows any counts/ConnectedClientsHost: Dell R730 + Tesla M10 + Win2016Guests: Win10, win2012R2 and Win10 with DDA assigned GPU.We wanted to use this configuration as RDSH server mainly, baremetal I guess it's the name.thanks, alaxa
2018-10-10 17:23
我正在使用 Nucleo F446ZE 来测试定时器功能以制作峰值保持 PWM 驱动器。我已经拥有核心功能，其中 TIM1 使用 DMA 以较高频率（例如 5 kHz）为高端 mosfet 运行可变占空比缓冲区。TIM2 由 TIM1 触发，为低侧 mosfet 产生低频（例如 1 Hz）同步信号。我现在遇到的问题是制作与前两个同步但具有可编程相移的第三个定时器输出。事实上，我确实有代码可以生成如图所示的同步相移信号，但存在一个问题。图片图例：TIM1 高频（黄色）、TIM2 低频（青色）、TIM2 相移下降沿触发（品红色）和 TIM3 相移信号（蓝色）。应该发生的是蓝线在品红色线的下降沿处变高，如示波器图像的第二半部分所示。这种方法确实有效，除了示波器图像的第一半部分中看到的第一个输出周期；蓝线与所有其他定时器输出一起变高，而不是被延迟。我的制作方法是（代码如下）：将 TIM1 触发输出设置为使能 (CNT_EN)将 TIM2 从模式设置为触发源 ITR0TIM2 CH1 为移相下降沿触发。输出是 PWM 生成，其中 CCR1 设置相移将 TIM2 触发输出设置为比较脉冲 (OC1)。对应CH1下降沿。TIM2 CH2为低频PWM输出将 TIM3 从模式设置为触发源 ITR1TIM3 CH1为移相信号我只是不明白为什么蓝色输出在第一个周期开始得早。我尝试更改启用定时器和捕获比较通道的顺序，但这没有用。我还尝试清除 TIM2 SR_CC1IF、SR_TIF 和 EGR_TG 位，以防 TIM2 触发器输出被触发，但都没有成功。我知道这里还有其他线程显示使用一种脉冲模式来执行此操作。我试过了，但问题是一个脉冲有一个最小的非零延迟。我将它与高速相机一起使用，大部分时间我都不需要延迟，所以它不会起作用。该解决方案在编程时没有延迟，第一个脉冲除外。启动定时器的代码HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); // arm TIM2 CH1: phase-shift falling-edge triggerHAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2); // arm TIM2 CH2: low-side mosfetHAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_1); // arm TIM3 CH1: phase-shift sync signalHAL_TIM_PWM_Start_DMA(&htim1, TIM_CHANNEL_1, (uint32_t *)pData1, sizeof(pData1) / sizeof(pData1[0])); // start TIM1, triggers TIM2TIM1 初始化static void MX_TIM1_Init(void){/* USER CODE BEGIN TIM1_Init 0 *//* USER CODE END TIM1_Init 0 */TIM_ClockConfigTypeDef sClockSourceConfig = {0};TIM_MasterConfigTypeDef sMasterConfig = {0};TIM_OC_InitTypeDef sConfigOC = {0};TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};/* USER CODE BEGIN TIM1_Init 1 *//* USER CODE END TIM1_Init 1 */htim1.Instance = TIM1;htim1.Init.Prescaler = 319;htim1.Init.CounterMode = TIM_COUNTERMODE_UP;htim1.Init.Period = 99;htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;htim1.Init.RepetitionCounter = 0;htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;if (HAL_TIM_Base_Init(&htim1) != HAL_OK){ Error_Handler();}sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK){ Error_Handler();}if (HAL_TIM_PWM_Init(&htim1) != HAL_OK){ Error_Handler();}sMasterConfig.MasterOutputTrigger = TIM_TRGO_ENABLE;sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE;if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK){ Error_Handler();}sConfigOC.OCMode = TIM_OCMODE_PWM1;sConfigOC.Pulse = 0;sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK){ Error_Handler();}sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;sBreakDeadTimeConfig.DeadTime = 0;sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK){ Error_Handler();}/* USER CODE BEGIN TIM1_Init 2 *//* USER CODE END TIM1_Init 2 */HAL_TIM_MspPostInit(&htim1);}TIM2初始化static void MX_TIM2_Init(void){/* USER CODE BEGIN TIM2_Init 0 *//* USER CODE END TIM2_Init 0 */TIM_ClockConfigTypeDef sClockSourceConfig = {0};TIM_SlaveConfigTypeDef sSlaveConfig = {0};TIM_MasterConfigTypeDef sMasterConfig = {0};TIM_OC_InitTypeDef sConfigOC = {0};/* USER CODE BEGIN TIM2_Init 1 *//* USER CODE END TIM2_Init 1 */htim2.Instance = TIM2;htim2.Init.Prescaler = 7999;htim2.Init.CounterMode = TIM_COUNTERMODE_UP;htim2.Init.Period = 9999;htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;if (HAL_TIM_Base_Init(&htim2) != HAL_OK){ Error_Handler();}sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK){ Error_Handler();}if (HAL_TIM_PWM_Init(&htim2) != HAL_OK){ Error_Handler();}sSlaveConfig.SlaveMode = TIM_SLAVEMODE_TRIGGER;sSlaveConfig.InputTrigger = TIM_TS_ITR0;if (HAL_TIM_SlaveConfigSynchro(&htim2, &sSlaveConfig) != HAL_OK){ Error_Handler();}sMasterConfig.MasterOutputTrigger = TIM_TRGO_OC1;sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK){ Error_Handler();}sConfigOC.OCMode = TIM_OCMODE_PWM1;sConfigOC.Pulse = 0;sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK){ Error_Handler();}if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK){ Error_Handler();}/* USER CODE BEGIN TIM2_Init 2 *//* USER CODE END TIM2_Init 2 */HAL_TIM_MspPostInit(&htim2);}TIM3初始化static void MX_TIM3_Init(void){/* USER CODE BEGIN TIM3_Init 0 *//* USER CODE END TIM3_Init 0 */TIM_ClockConfigTypeDef sClockSourceConfig = {0};TIM_SlaveConfigTypeDef sSlaveConfig = {0};TIM_MasterConfigTypeDef sMasterConfig = {0};TIM_OC_InitTypeDef sConfigOC = {0};/* USER CODE BEGIN TIM3_Init 1 *//* USER CODE END TIM3_Init 1 */htim3.Instance = TIM3;htim3.Init.Prescaler = 7999;htim3.Init.CounterMode = TIM_COUNTERMODE_UP;htim3.Init.Period = 9999;htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;if (HAL_TIM_Base_Init(&htim3) != HAL_OK){ Error_Handler();}sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK){ Error_Handler();}if (HAL_TIM_PWM_Init(&htim3) != HAL_OK){ Error_Handler();}sSlaveConfig.SlaveMode = TIM_SLAVEMODE_TRIGGER;sSlaveConfig.InputTrigger = TIM_TS_ITR1;if (HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig) != HAL_OK){ Error_Handler();}sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK){ Error_Handler();}sConfigOC.OCMode = TIM_OCMODE_PWM1;sConfigOC.Pulse = 2499;sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK){ Error_Handler();}/* USER CODE BEGIN TIM3_Init 2 *//* USER CODE END TIM3_Init 2 */HAL_TIM_MspPostInit(&htim3);}
2023-02-07 08:23
为什么定时器中断、输出PWM、检测输入信号等操作都需要预先设定时基单元呢？TIM1和TIM8与通用定时器有哪些不同之处？
2021-11-15 07:06
如何利用pdf.js 实现在前端预览 .pdf 文件？
2021-12-20 06:49
你好。Grid 2.0是否正式发布（> = 2015年9月15日）？是否有Tesla M6 / M60的价格信息？是否可用于K1 / K2板（例如Linux支持）？什么是“NVidia许可CCU”（和价格）？K1 / K2主板是否需要NVidia许可证？我必须为K1 / K2（M6 / M60）硬件+ $支付Citrix Enterprise / Desktop许可证+ $ guest OS以及Microsoft SA或VDA + $ NVIDIA vGPU CCU许可证！谢谢你的回答，马丁PS：前向链接 - 实际NVidia CCU许可证费用为https://gridforums.nvidia.com/default/topic/543/general-discussion/grid-2-0/post/2718/#2718也由NVidia发布（> Dec 2016） -http://www.nvidia.com/object/grid-technology.html- > NVIDIA GRID包装，定价＆amp;许可指南许可常见问题解答 -http://nvidia.custhelp.com/app/answers/detail/a_id/4183/kw/xenapp%20licensing以上来自于谷歌翻译以下为原文Hello.Is Grid 2.0 officially released (>=15 September 2015) ?Is there any price information for Tesla M6/M60 ?Will it be available to K1/K2 boards (eg. linux support) ?What is "NVidia licensing CCU" (and price) ? Will the NVidia license be required for K1/K2 boards ?I must pay many $ for K1/K2 (M6/M60) hardware + $ for Citrix Enterprise/Desktop license + $ guest OS and for Microsoft SA or VDA + new $ for NVIDIA vGPU CCU license !Thanks for answers, MartinPS: Forward link - actual NVidia CCU license costs are https://gridforums.nvidia.com/default/topic/543/general-discussion/grid-2-0/post/2718/#2718 also published by NVidia (>Dec 2016) - http://www.nvidia.com/object/grid-technology.html -> NVIDIA GRID Packaging, Pricing & Licensing GuideLicensing FAQ - http://nvidia.custhelp.com/app/answers/detail/a_id/4183/kw/xenapp%20licensing
2018-09-10 17:14
