Any members know about Lab jack applications?
2011-10-08 11:04
the input at the pre amp is only about 60mvp-p ... if i increase it beyond this there is a mirror image
2019-06-17 11:05
中HSYNC、VSYNC、DE的极性该如何设置？.actvidPol = VPS_VIP_POLARITY_LOW,//VPS_VIP_POLARITY_DONT_CARE, .vsyncPol
2018-05-28 11:20
in case of CONTINUOUS_TIMED mode? So that I can take care about the timing budget (profile: long
2018-11-29 10:17
Hi,請問有AD9789 flatness 相關的技術文件嗎?? We need the documents about AD9789 register setting and recomended
2019-03-05 13:01
, I must measure the I and Q parts of a QPSK signal with a DSO9254A osciloscop. Do I have to care
2019-02-21 16:05
Polarity */VPS_VIP_POLARITY_LOW = 0, /* high Polarity */VPS_VIP_POLARITY_HIGH, /* Value is dont care */VPS_VIP_POLARITY_DONT_CARE =
2018-05-31 07:20
Hello everybody, I would be happy to hear opinions regarding "don’t care" as reset value: I
2019-03-18 13:53
DearSir/Madam, when i initialthe AD9371, the PLLs can be locked, including the 9528's PLLs,but when perform initialization calibration, it returned a ARM status erro, the ARM status always be ready,and it can't be changed using MYKONOS_radionOn(). can you give me some suggestion? Thanks!
2018-08-09 06:56
mode: 2 (push-pull)chip select: 0 (don\'t care)power mode:2 (on)bus width:2 (4 bits)timing spec: 6
2023-04-18 09:53
