求大神简单阐述一下 Xilinx 的Base Targeted Reference Design (TRD)是什么鬼呀？
2015-07-01 16:31
altium designer10中没有reference design and example么？怎么添加啊
2012-07-20 19:59
Manual或者QorIQ LX2160A Family Reference Manual ？而我在QorIQ LX2160A Reference
2023-03-24 08:17
`请问有人碰到过 运行 CRefer （cross reference）报错情况么？报错log 如下，有谁知道如何解决么？Spawning... creferhdl.exe-proj &
2017-11-16 11:08
大家好，当我运行report_utilization时，我没有获得切片使用百分比，只有FF / LUT / BRAM / DSP /等。如何通过report_utiliztion获得切片比率？谢谢
2018-10-18 14:26
design spec is upto 100W(20V, 5A), Could Cypress release the source code to me? Could I buy the reference
2018-08-24 11:55
design there is a question: What is the minimal number of bits that are required to maintain a close
2019-03-21 07:56
synth_design i have the following warning :ERROR: [DRC INBB-3]Several DSPs in the ip are considered as a
2018-11-08 11:33
design?no. of occupied slices from the map report or the actual ratio from synthesis report
2018-10-22 11:17
phys_opt_design write_checkpoint -force $ outputDir / post_place report_clock_utilization -file $ outputDir
2018-10-23 10:30
