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  • CY74FCT16500T,CY74FCT162500CT,

    These 18-bit universal bus transceivers can be operated in transparent, latched, or clock modes by combining D-type latches and D-type flip-flops. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch enable

    2010-08-21 22:38

  • CY74FCT16646T,CY74FCT162646T,p

    The CY74FCT16646T and CY74FCT162646T 16-bit transceivers are three-state, D-type registers

    2010-07-20 16:28

  • CY74FCT16543T,CY74FCT162543T,C

    The CY74FCT16543T and CY74FCT162543T are 16-bit, high-speed, low power latched transceivers

    2010-07-20 16:24

  • CY74FCT16827T,CY74FCT162827T,p

    The CY74FCT16827T 20-bit buffer/line driver and the CY74FCT162827T 20-bit buffer/line driver

    2010-07-15 15:15

  • CY74FCT16827T,CY74FCT162827T,p

    The CY74FCT16827T 20-bit buffer/line driver and the CY74FCT162827T 20-bit buffer/line driver

    2010-07-15 15:26

  • CY74FCT16374T,CY74FCT162374T,p

    CY74FCT16374T and CY74FCT162374T are 16-bit D-type registers designed for use as buffered registers

    2010-07-25 18:45

  • CY74FCT16827T,CY74FCT162827T,p

    The CY74FCT16827T 20-bit buffer/line driver and the CY74FCT162827T 20-bit buffer/line driver

    2010-07-15 15:12

  • CY74FCT16245T,CY74FCT162245T,C

    two buses, where high speed and low power are required. With the exception of the CY74FCT16245T, these devices can be operated either as

    2010-07-23 15:19

  • CY74FCT162841CT,pdf(20-Bit Lat

    The CY74FCT16841T and CY74FCT162841T are 20-bit D-type latches designed for use in bus

    2010-07-30 12:33

  • CY74FCT16841CT,pdf(20-Bit Latc

    The CY74FCT16841T and CY74FCT162841T are 20-bit D-type latches designed for use in bus

    2010-07-30 12:42