and the same time. On the 34450A in local mode this works fine. But in case 34450A 2nd channel is enabled
2018-11-13 10:29
问题所在章节:第5课 nand flash 控制器韦东山老师举例讲解写读取地址：他使用的芯片手册行第二个2nd cycle是 A8-A10， 一个页大小是 1Kwords（是否等于2k bytes
2019-04-10 07:45
It seems to be not written data to 2nd page of EEPROM. Has anybody tried this?
2019-04-04 20:14
~2~ ... My questions are: 1. MXA/PXA specifies the 2nd order harmonics distortion, but what about
2018-10-12 17:21
stage to NAND from 2nd stage in SD bootmmc rescan 0mw.b 0x81000000 0xFF 0x20000fatload mmc 0
2018-05-31 05:27
我们自己新做的板子，跟Appro的DM8127样机这部分是一样的。使用SD卡启动时，从打印的log来看，The 1st stage 已经起来了；在The 2nd stage 读取SD卡的UBOOT
2018-05-25 05:17
GiB NAND: HW ECC BCH8 Selected 2048 MiB Using default environment The 2nd stage U-Boot will now
2018-05-31 00:21
配置均失败。我们用示波器去检测ADF4350的输出时，也没有发现有时钟信号。在官方提供的ad9739a.c代码中当程序执行到第369到372行是跳出了程序（return -1）。图片如下。 2
2023-12-14 08:14
:0x403ce000,len:0x8d4load:0x403d0000,len:0x293centry 0x403ce000I (34) boot: ESP-IDF v4.3 2nd stage
2023-02-20 08:52
I2C接收错误以上来自于谷歌翻译以下为原文 I2C Reciving Error
2019-04-09 15:31
