{"error":{"root_cause":[{"type":"query_shard_exception","reason":"failed to create query: {\n \"regexp\" : {\n \"keyword\" : {\n \"value\" : \".*ADS1178/ADS1178,pdf (Quad/Octa.*\",\n \"flags_value\" : 65535,\n \"max_determinized_states\" : 10000,\n \"boost\" : 1.0\n }\n }\n}","index_uuid":"SON-ziQURzKK3JljPlVlCQ","index":"recommend_keyword_search_v1"}],"type":"search_phase_execution_exception","reason":"all shards failed","phase":"query","grouped":true,"failed_shards":[{"shard":0,"index":"recommend_keyword_search_v1","node":"-Gn7X2aRSFmN2hMyaNEUCA","reason":{"type":"query_shard_exception","reason":"failed to create query: {\n \"regexp\" : {\n \"keyword\" : {\n \"value\" : \".*ADS1178/ADS1178,pdf (Quad/Octa.*\",\n \"flags_value\" : 65535,\n \"max_determinized_states\" : 10000,\n \"boost\" : 1.0\n }\n }\n}","index_uuid":"SON-ziQURzKK3JljPlVlCQ","index":"recommend_keyword_search_v1","caused_by":{"type":"illegal_argument_exception","reason":"expected ')' at position 34"}}}]},"status":400}
The ADS1174 (quad) and ADS1178 (octal) are multiple delta-sigma (ΔΣ) analog-to-digital converters
2010-06-03 16:50
电子发烧友网站提供《ADS1174和ADS1178模数转换器(ADC)数据表.pdf》资料免费下载
2024-07-24 09:51
看了ADS1178的数据手册,输入时钟CLK范围是100kHz到27MHz之间,SCLK推荐为CLK的1、1/2等 问题: 1、转换速率是否只与MODE有关,与输入时钟无关?若设置MODE为0
2025-01-24 07:21
关于ADS1178:当前我们使用SPI数据模式.CLK的频率为250K.通道为全部有效,高电平状态.发送SYNC信号后,接收到DRDY信号下降沿,读取不到数据,全部为低电平.电路图如下所示.请问是什么原因造成的?
2019-06-13 06:58
EVALUATION MODULE FOR ADS1178
2023-03-30 11:47
三块ads1178菊花链模式连接在一起,使用spi模式,单片机时钟25mhz,spi的时钟21mhz,程序跑下来,在硬件的drdy下,有时候时间不够,数据发生错误。请问三块ads78采用25mhz和21mhz能跑的通过吗
2025-01-03 07:01
ADS1178采用HTQFP-64PowerPAD封装,具有25kHz的带宽、2uV/C的失调电压漂移、高达97dB的信噪比(SNR).
2021-04-16 06:00
我使用ADS1178电路图如下图所示,采用SPI模式,ADC_CLK为25MHz,由CPLD产生SYNC,脉冲宽度为120ns,测试DRDY管脚一直为高电平,这是什么原因呢?
2025-01-23 06:54
1、ADS1178的手册上说明AVDD可以到5V, VREF最大2.5V。如果这样的供电,是否意味着AINP/AINN单端直流电压最大到5V,AINP-AINN差分电压最大到2.5V? 2
2024-12-24 07:56
谁有八通道模数转换器ADS1178的前级数据采样电路(主要是对电网电压的采样),谢谢
2019-06-06 09:49