前言：多年前，网上出现一组介绍集成电路(芯片)制造的漫画，而且有英文版。无论从专业角度还是漫画角度看，笔者认为漫画画的很棒！可惜网上漫画清晰度不高。笔者对这些漫画进行了清晰化，并配上了通俗的说明文
2020-09-24 17:08
一个国家在国际市场竞争中能否获得优势，芯片制造技术就是关键的影响因素之一。中美贸易摩擦逐渐升级后，许多国产企业都面临被芯片“卡脖子”的困境，国内各大芯片
2022-06-29 16:51
1. Introduction This document indicates the hardware/software design notes to migrate from Beckhoff ET1100 ESC solution to AX58100 ESC solution. 2. Functions Overview The AX58100 is a 2/3-port EtherCAT Slave Controller (ESC), licensed from Beckhoff Automation, with two integrated Fast Ethernet PHYs which support 100Mbps full-duplex operation and HP Auto-MDIX. AX58100 supports 9 Kbytes Process Data RAM, 8 Fieldbus Memory Management Units (FMMUs), 8 Sync-Managers and a 64-bit Distributed Clock. Compared to other EtherCAT slave controller solutions, the AX58100 integrates two embedded Fast Ethernet PHYs which can support both copper and fiber industrial Ethernet applications and supports some additional interfaces such as Pulse Width Modulation (PWM), Incremental (ABZ)/Hall Encoder, SPI master, 32 Digital I/O, Emergency Stop Input, etc. for designers to easily implement AX58100 on different EtherCAT industrial fieldbus applications without extra microprocessor. The AX58100 provides SPI slave and Local bus Process Data Interfaces (PDI) to provide an easy way for system designers to implement the standard EtherCAT communication functionalities on those traditional non-EtherCAT MCU and DSP industrial platforms. The AX58100 provides a cost-effective EtherCAT slave controller solution for industrial automation, motion/motor/Digital IO control, Digital to Analog (DAC)/Analog to Digital (ADC) converters control, sensors data acquisition, robotics, etc. industrial Ethernet fieldbus applications. The following is the major features comparison between AX58100 and Beckhoff ET1100 ESC solutions.2-1. Block DiagramThe following are the block diagrams of AX58100 and ET1100.Figure 2-1. AX58100 Block DiagramFigure 2-2. ET1100 Block Diagram2-2. Application DiagramThe following are the typical applications diagrams of AX58100 and ET1100. The AX58100 integrates additional interfaces such as Pulse Width Modulation (PWM), ABZ/Hall Encoder, SPI master, 32 Digital I/O, Emergency Stop Input, etc. for designers to easily implement AX58100 on different EtherCAT industrial fieldbus applications without extra microprocessor.Figure 2-4. ET1100 Application Diagram3. Hardware TransitionThis section indicates the hardware design considerations while migrating from Beckhoff ET1100 ESC solution to AX58100 ESC solution. 3-1. Bootstrap Hardware Configuration Pins The AX58100 supports five multi-function bootstrap pins (pin 19, 20, 58, 40, and 41) for five hardware configurations, i.e. external I2C EEPROM size, ESC supported port number, RSTO polarity and integrated port 0/1 PHY media mode; and supports other three multi-function bootstrap pins (pin 42, 52, 66) for the configuration of port 2 MII signals. User needs to utilize an external resistor to pull up/down these bootstrap pins for correct AX58100 hardware configuration. Beckhoff supports different hardware configuration pins based on the ET1100 product design specification. Please refer to Beckhoff ET1100 datasheet for details.3-2. Ethernet Ports The AX58100 ESC, which is licensed from Beckhoff Automation, supports two embedded PHYs and an optional MII interface for flexible network topology. The embedded Fast Ethernet PHYs support 100Mbps full-duplex operation and HP Auto-MDIX, and are fully compliant with the 100BASE-TX and 100BASE-FX Ethernet standards such as IEEE 802.3u, and ANSI X3.263- 1995 (FDDI-TP-PMD) for both copper and fiber industrial Ethernet applications. The optional MII interface of AX58100 ESC is optimized for low processing/forwarding delays by omitting a transmit FIFO. To allow this, the ESC has additional requirements to Ethernet PHY, which is easily accomplished by several PHY vendors. Please refer to Beckhoff’s PHY Selection Guide to select a proper Ethernet PHY. AX58100 Port 0 and Port 1 integrate embedded Ethernet PHYs, and Port 2 is an optional MII interface which are multi-function pins shared with others interfaces (i.e. PWM, Hall, Local Bus, Digital I/O). Packets are forwarded in the following order: Port 0 -> EtherCAT Processing Unit -> Port 1 -> Port 2 AX58100 supports six Bootstrap pins (pin 20, 40-42, 52 and 66) for Ethernet ports hardware configurations. Please refer to Tabel 3-1 for details.The following is the principle connection between AX58100 Port 2 MII interface and Ethernet PHY. The clock source of the Ethernet PHYs and ESC must be the same quartz. The TX_CLK is not connected because the ESCs do not incorporate a TX FIFO. The TX signals can be delayed inside the ESC by setting AX58100 TX_SH[1:0] bootstrap pins for TX_CLK phase shift compensation. The LINK is connected to the PHY LED output indicating a 100 Mbps (Full Duplex) link.
2020-06-17 09:53
整理 MPP sample 使用说明文档的目的是：使 MPP sample 更好用。
2023-03-06 10:33
一、组成 ZYNQ上面移植Linux操作系统包括四个部分，uboot,devicetree,kernel,ramdisk. 其中uboot类似于bios，负责对设备进行简单的初始化，devicetree以树的形式对zynq相连的硬件设备进行描述，kernel是加载的操作系统内核，ramdisk是操作系统启动之后挂载的文件系统。 二、启动过程 移植操作系统后zynq的启动过程如下，首先加载bootrom（zynq中自带，用户无法修改），然后执行fsbl（这个根据硬件在sdk中创建），然后执行uboot，uboot会将kernel、devicetree和ramdisk载入ddr，跳
2020-12-14 14:59
为在库卡 WorkVisual 项目内对各种不同的工业以太网现场总线模块进行项目设置，必须从制造商处取得相应的 GSDML 文件 （设备说明文件）。
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在许多UNIX说明文件里，都有RLF控制字符。当我们运用shell特殊字符">"和">>"，把说明文件的内容输出成纯文本文件时，控制字符会变成乱码，col指令则能有效滤除这些控制字符。
2018-10-11 16:43
日前，嘉楠科技宣布开源最新一代K230芯片软硬件开发包。软件开发包不仅涵盖K230开源代码、软件API库、使用说明文档、相关调试及下载工具，还提供多个SDK用例和AI Demo示例，帮助开发者快速
2023-07-10 11:31
