2017-05-18 11:16
基于sst89e564的工业加湿器控制系统设计，有人有相关于这个的硬件电路或者程序的源文件的吗？本人的毕业设计，奈何自己选择了财务这条路，所以现在很着急，有提供上述帮助的愿意支付报酬。
2017-05-10 19:14
美国著名未来学家尼葛洛庞帝1999年1月访华时预言，4～5年后嵌入式智能(电脑)工具将是PC和因特网之后最伟大的发明。事实正如尼葛洛庞帝先生所预料的那样，嵌入式系统及其应用已成为当前研究和应用的热点
2019-11-11 07:15
，智能化，网络化的发展，嵌入式系统技术将获得广阔的发展空间。美国著名未来学家尼葛洛庞帝99年1月访华时预言，4～5年后嵌入式智能(电脑)工具将是PC和因特网之后最伟大的发明。我国著名嵌入式系统专家沈绪榜
2015-08-08 18:34
“天下苦IP授权久矣。”一夜之间，芯片业成为科技媒体的热门话题。
2019-09-11 11:51
我正在尝试使用PIC32MZ2048EFH144中的SQI模块来读写SST26VF064B串行闪存。启用和谐中的SQI仅设置IO引脚，所以我使用来自和谐v1.09中的PIO示例。从2到4设置总线速度为25MHz。我已经确认PBCLK5被设置为100MHz的输出并被启用，并且REFCLK02被关闭，它们在和谐时钟设置屏幕和SFR中都被确认。SQICFG寄存器看起来像SQI1CLKCON寄存器一样按照代码正确设置，不幸的是时钟稳定了。SQI1CLKCON寄存器中的e位从不设置，因此代码位于函数末尾的while循环中。我将代码更改回其原始设置（DRV_SQI_CS_OEN_1和CLK_DIV_2），并得到相同的结果。我检查了SQI1CON寄存器，并且CMDINIT位被设置为2，这看起来是不正确的，但是在上面的代码中清除它们（空闲）仍然不会影响结果，SQICLK永远不会稳定。非常感谢您的帮助！拉里！ 以上来自于百度翻译 以下为原文 I am trying to use the SQI module in the PIC32MZ2048EFH144 to read and write to a SST26VF064B serial flash.The project is in MPLAB X 3.40, XC32 V1.42, and I am using Harmony v1.09. Enabling the SQI in Harmony only sets the IO pins so I am using the PIO example from within Harmony v1.09.Here is the SQI_Initialize from the example: // *****************************************************************************// *****************************************************************************// Section: SQI Static Driver Functions// *****************************************************************************// *****************************************************************************void DRV_SQI_Initialize(void){ // Set up SQI Configuration (SQI1CFG) Register PLIB_SQI_ConfigWordSet(DRV_SQI_ID_0,1,DRV_SQI_CS_OEN_BOTH, // was DRV_SQI_CS_OEN_1,DRV_SQI_DATA_OEN_QUAD,0, // Resets control, transmit, receive buffers and state machines1, // Burst Enable (always set to '1')0, // SQID2 doesn?t act as HOLD# signal in single and dual lane modes0, // SQID3 doesn?t act as WP# signal in single and dual lane modes0, // Receive latch is not active in transmit modeDRV_SQI_DATA_FORMAT_MSBF,DRV_SQI_DATA_MODE_0,DRV_SQI_XFER_MODE_PIO); // Configure SQI1CLKCON PLIB_SQI_ClockDividerSet(DRV_SQI_ID_0, CLK_DIV_4); // was CLK_DIV_2 PLIB_SQI_ClockEnable(DRV_SQI_ID_0); while (!PLIB_SQI_ClockIsStable(DRV_SQI_ID_0));} The only changes made were to allow both CS_0 and CS_1 to be used (I also have a microSD card for later development) and to change the clock divider from 2 to 4 to set the bus speed at 25MHz. I have confirmed that PBCLK5 is set for a 100MHz output and enabled and that REFCLK02 is turned off, they are confirmed both in the Harmony clock settings screen and in the SFR's. The SQICFG register appears to be set properly per the code as is the SQI1CLKCON register, unfortunately the clock stable bit in the SQI1CLKCON register never sets so the code sits in the while loop at the end of the function. I changed the code back to its original settings (DRV_SQI_CS_OEN_1 and CLK_DIV_2) and get the same results. I checked the SQI1CON register and the CMDINIT bits were set to 2 which seems incorrect but clearing them (idle) in the code above still does not affect the outcome, the SQICLK never stabilizes. Any help would be GREATLY appreciated!! Larry
2019-05-15 12:33
